The present invention relates to operational amplifiers, and more particularly, to an operational amplifier having an all NPN transistor output stage.
Operational amplifiers (op amps) are well known in electronic circuit design. A conventional op amp receives first and second input signals at its inverting and non-inverting inputs and provides an output signal as an amplified difference of the first and second input signals. The first and second input signals are typically processed through one or more differential amplifier stages and then through a differential-to-single-ended converter. An output drive stage takes the single-ended output signal and enables upper and lower output drive transistors serially coupled between first and second power supply potentials. The upper drive transistor in the output drive stage is typically NPN and the bottom drive transistor is PNP.
A significant problem experienced by op amps with the aforedescribed PNP-NPN transistor output stage is a limited operating frequency, say 1 MHz. The problem is principally due to the slow frequency response of the PNP transistor in the output drive stage. NPN transistors are known to operate at a much higher frequency. As the need for higher speed op amps continues to grow, it becomes advantageous to eliminate any PNP transistors from the output drive stage to allow the op amp to operate at higher frequencies.